Message Signaled Interrupts in PCI/PCIE : Advantages over INTx|Sasken

  Sep 9, 2014 4:48:22 PM

Traditionally PCI have hardwired interrupts i.e. INTA, INTB, INTC and INTD. These interrupts are either shared or dedicated to a specific PCI device. When one of the PCI devices raises an interrupt, interrupt handler in device driver has to check interrupt status register of the PCI device to identify cause of the interrupt and then invokes the interrupt service routine(ISR). This approach adds latency before invoking ISR. Additional latency gets added if interrupts are shared among the PCI devices.

To overcome the latency issues, Message Signal Interrupts (MSI) is introduced in PCI 2.2 and later versions. In case of MSI, the interrupt vector index is directly provided to the host processor. Using the vector number, processor identifies interrupt handler.

During driver initialization PCI device driver registers interrupt handler for each interrupt vector unlike in the earlier case of having only one interrupt handler. The MSI vectors are initialized and stored in the PCI configuration space within a PCI device. The PCI device requests a service by executing a memory-write of the MSI vector to a known destination address. This MSI vector information is then forwarded by the interrupt controller (I/O Interrupt Controller) associated with the host processor.

There are many advantages of MSI over INTx. Few of them are mentioned below:

  • Large numbers of interrupt vector i.e. 32 in MSI and 2048 in MSI-X (MSI extended defined in PCI 3.0)
  • Sharing of interrupt vectors is eliminated
  • Simplified interrupt servicing and reduced interrupt latency
  • Multi-function devices may have multiple interrupts per function.
  • Improved CPU utilization and system reliability

Modern high-end network cards support MSI-X. It implements multiple Tx-Rx queues. Each queue tied up to an interrupt vector and multiple interrupt service threads are implemented in NIC drivers to handle these queues.

Sasken has enriched its device driver expertise by developing high end network interface card driver that handles multiple interrupts spread across multiple cores using interrupt affinity techniques.

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